Khan
12/18/2022, 18:18:18
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Thanks.
BTW, how do they align the Xtacking contacts between the 2 chips on the YMTC chips?
And how are the layers built on the NAND chip. Are they all built on the epitaxial, or bulk, layer of the silicon wafer? Or, is each layer built with additional layer of add-on materials (e.g. putting on by evaporation?)?
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